1. Field of the Invention
This invention relates to input/output (I/O) buffers, and more particularly, to an I/O buffer with a reduced ring-back effect, which is specifically designed for use in conjunction with a data transmission bus with high-frequency and low-swing data signals.
2. Description of Related Art
With advances in semiconductor technologies, today's integrated circuits are fabricated into higher integration with low power consumption and high-speed operation. As a result, data transmission buses between the various integrated circuits in computer systems are subjected to the transmission of high-frequency and low-swing data signals. One data transmission bus of this type includes, for example, the GTL+bus.
FIG. 1 is a schematic diagram showing the configuration of a conventional GTL+bus. As shown, the conventional GTL+bus includes a first GTL+I/O buffer IC 1, a second GTL+I/O buffer IC2, a first transmission line 10, a second transmission line 12, and a termination resistor r.sub.t1 (which is typically 50 .OMEGA. in resistance). The termination resistor r.sub.t1 has one end connected to a system voltage V.sub.tt and the other end connected to the second transmission line 12. The other end of the second transmission line 12 is connected to both the IC1 and the first transmission line 10; the other end of the first transmission line 10 is connected to the IC2.
When the IC1 serves as the input end and the IC2 serves as the output end, the ring-back effect in the I/O buffer is insignificant because the IC1 at the input end is close to the termination resistor r.sub.t1. On the other hand, because no termination resistor is provided near the IC2, when the IC2 serves as the input end and the IC1 serves as the output end, an undesired ring-back effect is evident at node 16, located between the IC2 and the transmission line 10.
The ring-back effect on the input data signal to the IC2 at the node 16 is illustrated in FIG. 2. As shown, when the input data signal is switched from 1.5 V (i.e., the high-voltage logic state) to V.sub.OL (i.e., the low-voltage logic state, which is about 0.2 V), a bounce-back occurs in the waveform at the point 18 near V.sub.OL due to the ring-back effect. The voltage level of the bounce-back point 18 can be as high as 0.8 V which is very close to the reference voltage V.sub.ref =1.0 V. The logic value of the output of the I/O buffer can thus be affected.
A conventional solution to the foregoing problem, as illustrated in FIG. 1, is to connect a transmission line 14 to the node 16 between the IC2 and the transmission line 10 and a 50 .OMEGA. resistor r.sub.t2 between the transmission line 14 and the system voltage V.sub.tt. This configuration can significantly reduce the ring-back effect when the IC2 serves as the input end and IC1 serves as the output end. However, since the I/O buffer now includes two resistors r.sub.t1, r.sub.t2, it can cause a pull-up effect on the waveform of the data signal at the IC1. The pull-up effect is the name of the phenomenon wherein the rising waveform of the data signal at IC1 rises more rapidly and falls more slowly than normal. Moreover, the additional resistor r.sub.t2 will cause the overall I/O buffer power consumption to increase. One method to reduce the power consumption is to replace the 50 .OMEGA. resistor with one having a larger resistance. However, this solution only stabilizes about 0.1 V of the ripples in the signal waveform that are caused by the ring-back effect. If each IC2 on the circuit board is provided with a 50 .OMEGA. resistor, a large area of layout space on the circuit board will be required and the overall power consumption will increase dramatically, thus leading to high manufacturing and operating costs.